term/ns8250: Move base clock definition to a header

And while at it, unify it as clock frequency in Hz, to match the value in
grub_serial_config struct and do the division by 16 in one common place.

This will simplify adding SPCR support.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Daniel Kiper <daniel.kiper@oracle.com>
This commit is contained in:
Benjamin Herrenschmidt 2022-12-23 12:47:55 +11:00 committed by Daniel Kiper
parent 9fb22d0478
commit ee48f6c1ba
2 changed files with 21 additions and 7 deletions

View File

@ -37,12 +37,6 @@ static const grub_port_t serial_hw_io_addr[] = GRUB_MACHINE_SERIAL_PORTS;
static int dead_ports = 0;
#ifdef GRUB_MACHINE_MIPS_LOONGSON
#define DEFAULT_BASE_CLOCK (2 * 115200)
#else
#define DEFAULT_BASE_CLOCK 115200
#endif
static grub_uint8_t
ns8250_reg_read (struct grub_serial_port *port, grub_addr_t reg)
{
@ -71,7 +65,14 @@ serial_get_divisor (const struct grub_serial_port *port __attribute__ ((unused))
grub_uint32_t divisor;
grub_uint32_t actual_speed, error;
base_clock = config->base_clock ? (config->base_clock >> 4) : DEFAULT_BASE_CLOCK;
/* Get the UART input clock frequency. */
base_clock = config->base_clock ? config->base_clock : UART_DEFAULT_BASE_CLOCK;
/*
* The UART uses 16 times oversampling for the BRG, so adjust the value
* accordingly to calculate the divisor.
*/
base_clock >>= 4;
divisor = (base_clock + (config->speed / 2)) / config->speed;
if (config->speed == 0)

View File

@ -70,6 +70,19 @@
/* Turn on DTR, RTS, and OUT2. */
#define UART_ENABLE_OUT2 0x08
/*
* Default clock input of the UART (feeds the baud rate generator).
*
* The standard value here is 1.8432 MHz, which corresponds to
* 115200 bauds * 16 (16 times oversampling).
*
*/
#ifdef GRUB_MACHINE_MIPS_LOONGSON
#define UART_DEFAULT_BASE_CLOCK ((2 * 115200) << 4)
#else
#define UART_DEFAULT_BASE_CLOCK (115200 << 4)
#endif
#ifndef ASM_FILE
#include <grub/cpu/io.h>